TY  - JOUR
AU  - Milutinović, N.
AU  - Obradović, Milan
AU  - Aranđelović, Vojislav
AU  - Rodić, R.
PY  - 1996
UR  - https://vinar.vin.bg.ac.rs/handle/123456789/1992
AB  - A simple method of starting a new acquisition cycle in microprocessor-controlled frequency synthesising systems in order to suppress the image frequency mode is described. The image frequency detector built into the 305-415 kHz first local oscillator - frequency synthesiser of a 20 Hz - 110 kHz selective voltmeter, supported by an Intel 80C39 microcontroller, identifies the appearance of the image frequency mode in the system and generates a signal to start the procedure carried out by the microcontroller. The microcontroller changes the reference frequency to suppress the signal at the variable input of the phase detector of the phase locked loop (PLL) containing a frequency mixer. This, in turn, forces the phase detector of this PLL to generate an increased voltage, up to 12V, across the associated varactor diode and, by increasing the loop frequency, restore proper functioning of the synthesiser.
T2  - IEE Proceedings: Circuits Devices and Systems
T1  - Suppression of image frequency mode in microprocessor-controlled frequency synthesising systems
VL  - 143
IS  - 3
SP  - 171
EP  - 173
DO  - 10.1049/ip-cds:19960455
ER  - 

@article{
author = "Milutinović, N. and Obradović, Milan and Aranđelović, Vojislav and Rodić, R.",
year = "1996",
abstract = "A simple method of starting a new acquisition cycle in microprocessor-controlled frequency synthesising systems in order to suppress the image frequency mode is described. The image frequency detector built into the 305-415 kHz first local oscillator - frequency synthesiser of a 20 Hz - 110 kHz selective voltmeter, supported by an Intel 80C39 microcontroller, identifies the appearance of the image frequency mode in the system and generates a signal to start the procedure carried out by the microcontroller. The microcontroller changes the reference frequency to suppress the signal at the variable input of the phase detector of the phase locked loop (PLL) containing a frequency mixer. This, in turn, forces the phase detector of this PLL to generate an increased voltage, up to 12V, across the associated varactor diode and, by increasing the loop frequency, restore proper functioning of the synthesiser.",
journal = "IEE Proceedings: Circuits Devices and Systems",
title = "Suppression of image frequency mode in microprocessor-controlled frequency synthesising systems",
volume = "143",
number = "3",
pages = "171-173",
doi = "10.1049/ip-cds:19960455"
}

Milutinović, N., Obradović, M., Aranđelović, V.,& Rodić, R.. (1996). Suppression of image frequency mode in microprocessor-controlled frequency synthesising systems. in IEE Proceedings: Circuits Devices and Systems, 143(3), 171-173.
https://doi.org/10.1049/ip-cds:19960455

Milutinović N, Obradović M, Aranđelović V, Rodić R. Suppression of image frequency mode in microprocessor-controlled frequency synthesising systems. in IEE Proceedings: Circuits Devices and Systems. 1996;143(3):171-173.
doi:10.1049/ip-cds:19960455 .

Milutinović, N., Obradović, Milan, Aranđelović, Vojislav, Rodić, R., "Suppression of image frequency mode in microprocessor-controlled frequency synthesising systems" in IEE Proceedings: Circuits Devices and Systems, 143, no. 3 (1996):171-173,
https://doi.org/10.1049/ip-cds:19960455 . .